10static const char *
const TAG =
"bl0942";
12static const uint8_t BL0942_READ_COMMAND = 0x58;
13static const uint8_t BL0942_FULL_PACKET = 0xAA;
14static const uint8_t BL0942_PACKET_HEADER = 0x55;
16static const uint8_t BL0942_WRITE_COMMAND = 0xA8;
18static const uint8_t BL0942_REG_I_RMSOS = 0x12;
19static const uint8_t BL0942_REG_WA_CREEP = 0x14;
20static const uint8_t BL0942_REG_I_FAST_RMS_TH = 0x15;
21static const uint8_t BL0942_REG_I_FAST_RMS_CYC = 0x16;
22static const uint8_t BL0942_REG_FREQ_CYC = 0x17;
23static const uint8_t BL0942_REG_OT_FUNX = 0x18;
24static const uint8_t BL0942_REG_MODE = 0x19;
25static const uint8_t BL0942_REG_SOFT_RESET = 0x1C;
26static const uint8_t BL0942_REG_USR_WRPROT = 0x1D;
27static const uint8_t BL0942_REG_TPS_CTRL = 0x1B;
29static const uint32_t BL0942_REG_MODE_RESV = 0x03;
30static const uint32_t BL0942_REG_MODE_CF_EN = 0x04;
31static const uint32_t BL0942_REG_MODE_RMS_UPDATE_SEL = 0x08;
32static const uint32_t BL0942_REG_MODE_FAST_RMS_SEL = 0x10;
33static const uint32_t BL0942_REG_MODE_AC_FREQ_SEL = 0x20;
34static const uint32_t BL0942_REG_MODE_CF_CNT_CLR_SEL = 0x40;
35static const uint32_t BL0942_REG_MODE_CF_CNT_ADD_SEL = 0x80;
36static const uint32_t BL0942_REG_MODE_UART_RATE_19200 = 0x200;
37static const uint32_t BL0942_REG_MODE_UART_RATE_38400 = 0x300;
38static const uint32_t BL0942_REG_MODE_DEFAULT =
39 BL0942_REG_MODE_RESV | BL0942_REG_MODE_CF_EN | BL0942_REG_MODE_CF_CNT_ADD_SEL;
41static const uint32_t BL0942_REG_SOFT_RESET_MAGIC = 0x5a5a5a;
42static const uint32_t BL0942_REG_USR_WRPROT_MAGIC = 0x55;
45static const uint32_t PKT_TIMEOUT_MS = 200;
54 if (avail <
sizeof(buffer)) {
58 ESP_LOGW(TAG,
"Junk on wire. Throwing away partial message (%d bytes)", avail);
65 if (this->
read_array((uint8_t *) &buffer,
sizeof(buffer))) {
76 uint8_t *
raw = (uint8_t *) data;
77 for (uint32_t i = 0; i <
sizeof(*data) - 1; i++) {
82 ESP_LOGW(TAG,
"BL0942 invalid checksum! 0x%02X != 0x%02X",
checksum, data->
checksum);
91 pkt[0] = BL0942_WRITE_COMMAND | this->
address_;
93 pkt[2] = (
val & 0xff);
94 pkt[3] = (
val >> 8) & 0xff;
95 pkt[4] = (
val >> 16) & 0xff;
96 pkt[5] = (pkt[0] + pkt[1] + pkt[2] + pkt[3] + pkt[4]) ^ 0xff;
112 (uint8_t) ((BL0942_READ_COMMAND + this->address_ + reg + resp.b[0] + resp.b[1] + resp.b[2]) ^ 0xff)) {
139 this->
write_reg_(BL0942_REG_USR_WRPROT, BL0942_REG_USR_WRPROT_MAGIC);
141 this->
write_reg_(BL0942_REG_SOFT_RESET, BL0942_REG_SOFT_RESET_MAGIC);
143 uint32_t
mode = BL0942_REG_MODE_DEFAULT;
144 mode |= BL0942_REG_MODE_RMS_UPDATE_SEL;
146 mode |= BL0942_REG_MODE_AC_FREQ_SEL;
160 ESP_LOGI(TAG,
"Invalid data. Header mismatch: %d", data->
frame_header);
170 this->prev_cf_cnt_ =
cf_cnt;
194 ESP_LOGV(TAG,
"BL0942: U %fV, I %fA, P %fW, Cnt %" PRId32
", ∫P %fkWh, frequency %fHz, status 0x%08X",
v_rms,
i_rms,
199 ESP_LOGCONFIG(TAG,
"BL0942:");
200 ESP_LOGCONFIG(TAG,
" Reset: %s", TRUEFALSE(this->
reset_));
201 ESP_LOGCONFIG(TAG,
" Address: %d", this->
address_);
202 ESP_LOGCONFIG(TAG,
" Nominal line frequency: %d Hz", this->
line_freq_);